User manual INTEL I7-900 DESKTOP PROCESSOR DATASHEET VOLUME 1

DON'T FORGET : ALWAYS READ THE USER GUIDE BEFORE BUYING !!!

If this document matches the user guide, instructions manual or user manual, feature sets, schematics you are looking for, download it now. Diplodocs provides you a fast and easy access to the user manual INTEL I7-900 DESKTOP PROCESSOR. We hope that this INTEL I7-900 DESKTOP PROCESSOR user guide will be useful to you.


INTEL I7-900 DESKTOP PROCESSOR DATASHEET VOLUME 1: Download the complete user guide (685 Ko)

You may also download the following manuals related to this product:

   INTEL I7-900 DESKTOP PROCESSOR DATASHEET VOLUME 2 (543 ko)
   INTEL I7-900 DESKTOP PROCESSOR SPECIFICATION UPDATE (457 ko)

Manual abstract: user guide INTEL I7-900 DESKTOP PROCESSORDATASHEET VOLUME 1

Detailed instructions for use are in the User's Guide.

[. . . ] Intel® CoreTM i7-900 Desktop Processor Extreme Edition Series and Intel® CoreTM i7-900 Desktop Processor Series Datasheet, Volume 1 February 2010 Document # 320834-004 INFORMATION IN THIS DOCUMENT IS PROVIDED IN CONNECTION WITH INTEL PRODUCTS. NO LICENSE, EXPRESS OR IMPLIED, BY ESTOPPEL OR OTHERWISE, TO ANY INTELLECTUAL PROPERTY RIGHTS IS GRANTED BY THIS DOCUMENT. EXCEPT AS PROVIDED IN INTEL'S TERMS AND CONDITIONS OF SALE FOR SUCH PRODUCTS, INTEL ASSUMES NO LIABILITY WHATSOEVER, AND INTEL DISCLAIMS ANY EXPRESS OR IMPLIED WARRANTY, RELATING TO SALE AND/OR USE OF INTEL PRODUCTS INCLUDING LIABILITY OR WARRANTIES RELATING TO FITNESS FOR A PARTICULAR PURPOSE, MERCHANTABILITY, OR INFRINGEMENT OF ANY PATENT, COPYRIGHT OR OTHER INTELLECTUAL PROPERTY RIGHT. INTEL PRODUCTS ARE NOT INTENDED FOR USE IN MEDICAL, LIFE SAVING, OR LIFE SUSTAINING APPLICATIONS. [. . . ] AH42 AH43 AH5 AH6 AH7 AH8 AH9 AJ1 AJ10 AJ11 AJ2 AJ3 AJ33 AJ34 AJ35 AJ36 AJ37 AJ38 AJ39 AJ4 AJ40 AJ41 AJ42 AJ43 AJ5 AJ6 AJ7 AJ8 AJ9 AK1 AK10 AK11 AK12 AK13 AK14 AK15 AK16 AK17 AK18 AK19 AK2 AK20 AK21 AK22 AK23 AK24 AK25 AK26 Pin Name QPI_DTX_DN[6] QPI_DTX_DN[8] FC_AH5 RSVD VSS RSVD TRST# RSVD TDO VCC RSVD RSVD VCC VSS BCLK_DP VSS RSVD QPI_DTX_DP[3] QPI_DTX_DN[3] RSVD QPI_DTX_DN[4] VSS QPI_DTX_DN[7] QPI_DTX_DP[8] VSS RSVD RSVD RSVD TDI RSVD VSS VCC VCC VCC VSS VCC VCC VSS VCC VCC RSVD VSS VCC VSS VSS VCC VCC VSS GND PWR GND GND PWR PWR GND GND PWR PWR PWR GND PWR PWR GND PWR PWR TAP I QPI GND QPI QPI GND O O O QPI QPI O O PWR GND CMOS GND I TAP PWR O TAP I GND Buffer Type QPI QPI Direction O O Table 4-2. AK27 AK28 AK29 AK3 AK30 AK31 AK32 AK33 AK34 AK35 AK36 AK37 AK38 AK39 AK4 AK40 AK41 AK42 AK43 AK5 AK6 AK7 AK8 AK9 AL1 AL10 AL11 AL12 AL13 AL14 AL15 AL16 AL17 AL18 AL19 AL2 AL20 AL21 AL22 AL23 AL24 AL25 AL26 AL27 AL28 AL29 AL3 AL30 VCC VCC VSS VSS VCC VCC VSS VCC VSS RSVD RSVD QPI_DTX_DP[2] QPI_DTX_DN[2] VSS RSVD QPI_DTX_DP[5] QPI_DTX_DN[5] QPI_DTX_DP[7] VSS RSVD RSVD RSVD ISENSE VSS VSS VID[0]/MSID[0] VSS VCC VCC VSS VCC VCC VSS VCC VCC VSS VSS VCC VSS VSS VCC VCC VSS VCC VCC VSS RSVD VCC PWR Analog GND GND CMOS GND PWR PWR GND PWR PWR GND PWR PWR GND GND PWR GND GND PWR PWR GND PWR PWR GND I/O I QPI QPI QPI GND O O O QPI QPI GND O O Pin Name Buffer Type PWR PWR GND GND PWR PWR GND PWR GND Direction 54 Datasheet Land Listing Table 4-2. AL31 AL32 AL33 AL34 AL35 AL36 AL37 AL38 AL39 AL4 AL40 AL41 AL42 AL43 AL5 AL6 AL7 AL8 AL9 AM1 AM10 AM11 AM12 AM13 AM14 AM15 AM16 AM17 AM18 AM19 AM2 AM20 AM21 AM22 AM23 AM24 AM25 AM26 AM27 AM28 AM29 AM3 AM30 AM31 AM32 AM33 AM34 AM35 VCC VSS VCC VCC VSS VSS VSS RSVD RESET# RSVD RSVD RSVD VSS QPI_CMP[0] RSVD RSVD VSS RSVD VID[1]/MSID[1] RSVD VID[3]/CSC[0] VSS VCC VCC VSS VCC VCC VSS VCC VCC RSVD VSS VCC VSS VSS VCC VCC VSS VCC VCC VSS RSVD VCC VCC VSS VCC VCC VSS PWR PWR GND PWR PWR GND GND PWR GND GND PWR PWR GND PWR PWR GND CMOS GND PWR PWR GND PWR PWR GND PWR PWR I/O CMOS I/O GND GND Analog Asynch I Pin Name Buffer Type PWR GND PWR PWR GND GND GND Direction Table 4-2. AM36 AM37 AM38 AM39 AM4 AM40 AM41 AM42 AM43 AM5 AM6 AM7 AM8 AM9 AN1 AN10 AN11 AN12 AN13 AN14 AN15 AN16 AN17 AN18 AN19 AN2 AN20 AN21 AN22 AN23 AN24 AN25 AN26 AN27 AN28 AN29 AN3 AN30 AN31 AN32 AN33 AN34 AN35 AN36 AN37 AN38 AN39 AN4 RSVD VSS RSVD VSS RSVD QPI_DRX_DN[15] QPI_DRX_DN[16] QPI_DRX_DP[16] QPI_DRX_DN[14] VSS RSVD RSVD RSVD VSS RSVD VID[4]/CSC[1] VSS VCC VCC VSS VCC VCC VSS VCC VCC RSVD VSS VCC VSS VSS VCC VCC VSS VCC VCC VSS VSS VCC VCC VSS VCC VCC VSS RSVD VSS RSVD QPI_DRX_DP[18] RSVD QPI I GND GND PWR GND GND PWR PWR GND PWR PWR GND GND PWR PWR GND PWR PWR GND CMOS GND PWR PWR GND PWR PWR GND PWR PWR I/O GND QPI QPI QPI QPI GND I I I I GND GND Pin Name Buffer Type Direction Datasheet 55 Land Listing Table 4-2. AN40 AN41 AN42 AN43 AN5 AN6 AN7 AN8 AN9 AP1 AP10 AP11 AP12 AP13 AP14 AP15 AP16 AP17 AP18 AP19 AP2 AP20 AP21 AP22 AP23 AP24 AP25 AP26 AP27 AP28 AP29 AP3 AP30 AP31 AP32 AP33 AP34 AP35 AP36 AP37 AP38 AP39 AP4 AP40 AP41 AP42 AP43 AP5 VSS QPI_DRX_DN[13] QPI_DRX_DP[14] RSVD RSVD VSS VID[7] VID[2]/MSID[2] VSS VSS VSS VCC VCC VSS VCC VCC VSS VCC VCC RSVD VSS VCC VSS VSS VCC VCC VSS VCC VCC VSS RSVD VCC VCC VSS VCC VCC VSS VSS VSS QPI_DRX_DP[19] QPI_DRX_DN[18] RSVD QPI_DRX_DN[17] QPI_DRX_DP[17] QPI_DRX_DP[13] VSS VSS QPI QPI QPI GND GND I I I PWR PWR GND PWR PWR GND GND GND QPI QPI I I GND PWR GND GND PWR PWR GND PWR PWR GND GND CMOS CMOS GND GND GND PWR PWR GND PWR PWR GND PWR PWR O I/O Pin Name QPI_DRX_DP[15] Buffer Type QPI GND QPI QPI I I Direction I Table 4-2. AP6 AP7 AP8 AP9 AR1 AR10 AR11 AR12 AR13 AR14 AR15 AR16 AR17 AR18 AR19 AR2 AR20 AR21 AR22 AR23 AR24 AR25 AR26 AR27 AR28 AR29 AR3 AR30 AR31 AR32 AR33 AR34 AR35 AR36 AR37 AR38 AR39 AR4 AR40 AR41 AR42 AR43 AR5 AR6 AR7 AR8 AR9 AT1 VSS PSI# VID[6] VID[5]/CSC[2] RSVD VCC VSS VCC VCC VSS VCC VCC VSS VCC VCC VSS VSS VCC VSS VSS VCC VCC VSS VCC VCC VSS VSS VCC VCC VSS VCC VCC VSS RSVD RSVD QPI_DRX_DN[19] VSS RSVD QPI_DRX_DN[12] QPI_CLKRX_DP QPI_CLKRX_DN QPI_DRX_DN[11] RSVD RSVD VCCPWRGOOD VSS_SENSE VCC_SENSE RSVD Asynch Analog Analog I QPI QPI QPI QPI I I I I QPI GND I PWR GND PWR PWR GND PWR PWR GND PWR PWR GND GND PWR GND GND PWR PWR GND PWR PWR GND GND PWR PWR GND PWR PWR GND Pin Name Buffer Type GND CMOS CMOS CMOS O O I/O Direction 56 Datasheet Land Listing Table 4-2. AT10 AT11 AT12 AT13 AT14 AT15 AT16 AT17 AT18 AT19 AT2 AT20 AT21 AT22 AT23 AT24 AT25 AT26 AT27 AT28 AT29 AT3 AT30 AT31 AT32 AT33 AT34 AT35 AT36 AT37 AT38 AT39 AT4 AT40 AT41 AT42 AT43 AT5 AT6 AT7 AT8 AT9 AU1 AU10 AU11 AU12 AU13 AU14 VCC VSS VCC VCC VSS VCC VCC VSS VCC VCC RSVD VSS VCC VSS VSS VCC VCC VSS VCC VCC VSS RSVD VCC VCC VSS VCC VCC VSS RSVD QPI_DRX_DP[0] VSS QPI_DRX_DN[7] RSVD QPI_DRX_DP[12] VSS QPI_DRX_DN[10] QPI_DRX_DP[11] RSVD RSVD VSS VSS VCC VSS VCC VSS VCC VCC VSS GND GND PWR GND PWR GND PWR PWR GND QPI GND QPI QPI I I I QPI GND QPI I I PWR PWR GND PWR PWR GND GND PWR GND GND PWR PWR GND PWR PWR GND Pin Name Buffer Type PWR GND PWR PWR GND PWR PWR GND PWR PWR Direction Table 4-2. AU15 AU16 AU17 AU18 AU19 AU2 AU20 AU21 AU22 AU23 AU24 AU25 AU26 AU27 AU28 AU29 AU3 AU30 AU31 AU32 AU33 AU34 AU35 AU36 AU37 AU38 AU39 AU4 AU40 AU41 AU42 AU43 AU5 AU6 AU7 AU8 AU9 AV1 AV10 AV11 AV12 AV13 AV14 AV15 AV16 AV17 AV18 AV19 VCC VCC VSS VCC VCC RSVD VSS VCC VSS VSS VCC VCC VSS VCC VCC VSS RSVD VCC VCC VSS VCC VCC VSS VSS QPI_DRX_DN[0] QPI_DRX_DP[1] QPI_DRX_DP[7] RSVD QPI_DRX_DP[9] QPI_DRX_DN[9] QPI_DRX_DP[10] VSS VSS RSVD RSVD RSVD VCC RSVD VCC VSS VCC VCC VSS VCC VCC VSS VCC VCC PWR GND PWR PWR GND PWR PWR GND PWR PWR PWR QPI QPI QPI GND GND I I I PWR PWR GND PWR PWR GND GND QPI QPI QPI I I I GND PWR GND GND PWR PWR GND PWR PWR GND Pin Name Buffer Type PWR PWR GND PWR PWR Direction Datasheet 57 Land Listing Table 4-2. AV2 AV20 AV21 AV22 AV23 AV24 AV25 AV26 AV27 AV28 AV29 AV3 AV30 AV31 AV32 AV33 AV34 AV35 AV36 AV37 AV38 AV39 AV4 AV40 AV41 AV42 AV43 AV5 AV6 AV7 AV8 AV9 AW1 AW10 AW11 AW12 AW13 AW14 AW15 AW16 AW17 AW18 AW19 AW2 AW20 AW21 AW22 AW23 RSVD VSS VCC VSS VSS VCC VCC VSS VCC VCC VSS VTT_VID2 VCC VCC VSS VCC VCC RSVD QPI_DRX_DP[2] QPI_DRX_DN[2] QPI_DRX_DN[1] VSS VSS QPI_DRX_DN[8] VSS RSVD RSVD RSVD VTT_VID4 RSVD RSVD VCC VSS VCC VSS VCC VCC VSS VCC VCC VSS VCC VCC RSVD VSS VCC VSS VSS GND PWR GND GND PWR GND PWR GND PWR PWR GND PWR PWR GND PWR PWR CMOS O QPI QPI QPI GND GND QPI GND I I I I GND PWR GND GND PWR PWR GND PWR PWR GND CMOS PWR PWR GND PWR PWR O Pin Name Buffer Type Direction Table 4-2. AW24 AW25 AW26 AW27 AW28 AW29 AW3 AW30 AW31 AW32 AW33 AW34 AW35 AW36 AW37 AW38 AW39 AW4 AW40 AW41 AW42 AW5 AW6 AW7 AW8 AW9 AY10 AY11 AY12 AY13 AY14 AY15 AY16 AY17 AY18 AY19 AY2 AY20 AY21 AY22 AY23 AY24 AY25 AY26 AY27 AY28 AY29 AY3 VCC VCC VSS VCC VCC VSS RSVD VCC VCC VSS VCC VCC VSS QPI_DRX_DP[3] QPI_DRX_DP[5] QPI_DRX_DN[5] RSVD RSVD QPI_DRX_DP[8] RSVD RSVD RSVD VSS RSVD VSS VCC VCC VSS VCC VCC VSS VCC VCC VSS VCC VCC VSS VSS VCC VSS VSS VCC VCC VSS VCC VCC VSS RSVD GND PWR PWR GND PWR PWR GND PWR PWR GND PWR PWR GND GND PWR GND GND PWR PWR GND PWR PWR GND GND QPI I PWR PWR GND PWR PWR GND QPI QPI QPI I I I Pin Name Buffer Type PWR PWR GND PWR PWR GND Direction 58 Datasheet Land Listing Table 4-2. AY30 AY31 AY32 AY33 AY34 AY35 AY36 AY37 AY38 AY39 AY4 AY40 AY41 AY42 AY5 AY6 AY7 AY8 AY9 B10 B11 B12 B13 B14 B15 B16 B17 B18 B19 B2 B20 B21 B22 B23 B24 B25 B26 B27 B28 B29 B3 B30 B31 B32 B33 B34 B35 B36 VCC VCC VSS VCC VCC RSVD QPI_DRX_DN[3] VSS QPI_DRX_DN[6] RSVD RSVD RSVD RSVD VSS RSVD RSVD VSS RSVD VCC DDR0_CS#[1] DDR0_ODT[2] VDDQ DDR0_WE# DDR1_MA[13] DDR0_CS#[4] DDR0_BA[0] VDDQ RSVD DDR0_MA[10] VSS RSVD DDR0_MA[1] VDDQ DDR0_MA[4] DDR0_MA[5] DDR0_MA[8] DDR0_MA[12] VDDQ RSVD DDR0_MA[15] BPM#[0] DDR0_CKE[2] DDR0_CKE[3] VDDQ RSVD RSVD RSVD RSVD CMOS GTL CMOS CMOS PWR O I/O O O CMOS PWR CMOS CMOS CMOS CMOS PWR O O O O O CMOS GND O PWR CMOS CMOS PWR CMOS CMOS CMOS CMOS PWR O O O O O O GND GND QPI GND QPI I I Pin Name Buffer Type PWR PWR GND PWR PWR Direction Table 4-2. B37 B38 B39 B4 B40 B41 B42 B5 B6 B7 B8 B9 BA10 BA11 BA12 BA13 BA14 BA15 BA16 BA17 BA18 BA19 BA20 BA24 BA25 BA26 BA27 BA28 BA29 BA3 BA30 BA35 BA36 BA37 BA38 BA39 BA4 BA40 BA5 BA6 BA7 BA8 BA9 C10 C11 C12 C13 C14 VSS DDR0_DQ[31] DDR0_DQS_P[3] BPM#[3] DDR0_DQS_N[3] PRDY# VSS DDR0_DQ[32] DDR0_DQ[36] VDDQ RSVD RSVD VCC VSS VCC VCC VSS VCC VCC VSS VCC VCC VSS VCC VCC VSS VCC VCC VSS VSS VCC VSS QPI_DRX_DP[4] QPI_DRX_DN[4] QPI_DRX_DP[6] VSS RSVD RSVD VSS RSVD RSVD RSVD VCC VDDQ RSVD DDR0_CAS# RSVD RSVD CMOS O PWR PWR GND PWR GND PWR PWR GND PWR PWR GND PWR PWR GND PWR PWR GND PWR PWR GND GND PWR GND QPI QPI QPI GND I I I Pin Name Buffer Type GND CMOS CMOS GTL CMOS GTL GND CMOS CMOS PWR I/O I/O I/O I/O I/O I/O O Direction Datasheet 59 Land Listing Table 4-2. C15 C16 C17 C18 C19 C2 C20 C21 C22 C23 C24 C25 C26 C27 C28 C29 C3 C30 C31 C32 C33 C34 C35 C36 C37 C38 C39 C4 C40 C41 C42 C43 C5 C6 C7 C8 C9 D1 D10 D11 D12 D13 D14 D15 D16 D17 D18 D19 VDDQ DDR2_WE# DDR1_CS#[4] DDR1_BA[0] DDR0_CLK_N[1] BPM#[2] VDDQ DDR1_CLK_P[0] RSVD DDR0_MA[2] DDR0_MA[6] VDDQ DDR0_MA[9] DDR1_CKE[3] DDR0_BA[2] DDR0_CKE[0] BPM#[5] VDDQ RSVD RSVD RSVD RSVD VSS RSVD RSVD DDR0_DQ[30] RSVD DDR0_DQ[33] VSS DDR0_DQ[25] PREQ# VSS VSS DDR0_DQ[37] DDR0_ODT[3] DDR1_ODT[1] DDR0_ODT[1] BPM#[4] DDR2_ODT[3] DDR1_ODT[0] DDR1_CS#[0] VDDQ DDR1_ODT[2] DDR2_ODT[2] RSVD DDR2_RAS# VDDQ DDR0_CLK_P[1] CMOS PWR CLOCK O O CMOS GND CMOS GTL GND GND CMOS CMOS CMOS CMOS GTL CMOS CMOS CMOS PWR CMOS CMOS O O I/O O O O I/O O O O I/O I I/O CMOS I/O GND CMOS CMOS PWR CMOS CMOS CMOS CMOS GTL PWR O O O O I/O O O Pin Name Buffer Type PWR CMOS CMOS CMOS CLOCK GTL PWR CLOCK O O O O O I/O Direction Table 4-2. D2 D20 D21 D22 D23 D24 D25 D26 D27 D28 D29 D3 D30 D31 D32 D33 D34 D35 D36 D37 D38 D39 D4 D40 D41 D42 D43 D5 D6 D7 D8 D9 E1 E10 E11 E12 E13 E14 E15 E16 E17 E18 E19 E2 E20 E21 E22 E23 RSVD DDR1_CLK_N[0] DDR1_MA[7] VDDQ DDR0_MA[3] RSVD DDR2_CKE[2] DDR1_CKE[2] VDDQ DDR1_RESET# VSS RSVD RSVD DDR0_RESET# VSS RSVD RSVD RSVD DDR0_DQ[27] VSS RSVD RSVD DDR0_DQ[24] DDR0_DQ[28] DDR0_DQ[29] VSS RSVD DDR1_DQ[38] DDR1_DQS_N[4] VSS DDR2_CS#[5] VSS DDR1_CS#[5] VDDQ RSVD RSVD DDR1_CAS# RSVD VDDQ DDR2_CS#[4] DDR0_CLK_N[2] DDR0_CLK_N[3] BPM#[7] DDR0_CLK_P[3] VDDQ DDR1_MA[8] DDR1_MA[11] PWR CMOS CLOCK CLOCK GTL CLOCK PWR CMOS CMOS O O O O O I/O O CMOS O CMOS CMOS GND CMOS GND CMOS PWR O O I/O I/O CMOS CMOS CMOS GND I/O I/O I/O CMOS GND I/O CMOS GND O CMOS CMOS PWR CMOS GND O O O CLOCK CMOS PWR CMOS O O O Pin Name BPM#[6] Buffer Type GTL Direction I/O 60 Datasheet Land Listing Table 4-2. E24 E25 E26 E27 E28 E29 E3 E30 E31 E32 E33 E34 E35 E36 E37 E38 E39 E4 E40 E41 E42 E43 E5 E6 E7 E8 E9 F1 F10 F11 F12 F13 F14 F15 F16 F17 F18 F19 F2 F20 F21 F22 F23 F24 F25 F26 F27 F28 RSVD VDDQ DDR1_CKE[1] RSVD RSVD DDR0_DQS_P[4] RSVD VDDQ DDR2_RESET# RSVD RSVD RSVD VSS RSVD DDR2_DQ[31] DDR2_DQS_P[3] DDR0_DQS_N[4] DDR2_DQS_N[3] VSS DDR0_DQ[18] DDR0_DQ[19] DDR1_DQ[34] VSS DDR1_DQS_P[4] DDR1_DQ[33] DDR1_DQ[32] DDR0_DQ[34] DDR1_DQ[36] DDR1_ODT[3] DDR0_ODT[0] DDR2_ODT[1] VDDQ DDR2_MA[13] DDR2_CAS# DDR2_BA[1] DDR0_CLK_P[2] VDDQ DDR0_DQ[39] DDR2_MA[4] RSVD DDR1_MA[5] RSVD VDDQ RSVD DDR1_MA[15] RSVD RSVD CMOS O PWR CMOS O CMOS CMOS CMOS CMOS GND CMOS CMOS CMOS GND CMOS CMOS CMOS CMOS CMOS CMOS CMOS CMOS PWR CMOS CMOS CMOS CLOCK PWR CMOS CMOS I/O O O O O O I/O I/O I/O I/O I/O O O O I/O I/O I/O I/O I/O I/O I/O GND PWR CMOS O CMOS I/O PWR CMOS O Pin Name DDR1_MA[12] Buffer Type CMOS Direction O Table 4-2. F29 F3 F30 F31 F32 F33 F34 F35 F36 F37 F38 F39 F4 F40 F41 F42 F43 F5 F6 F7 F8 F9 G1 G10 G11 G12 G13 G14 G15 G16 G17 G18 G19 G2 G20 G21 G22 G23 G24 G25 G26 G27 G28 G29 G3 G30 G31 G32 VSS DDR0_DQ[38] RSVD RSVD RSVD RSVD VSS RSVD RSVD RSVD DDR2_DQ[30] VSS VSS DDR2_DQ[25] DDR0_DQS_P[2] DDR0_DQ[23] DDR0_DQ[22] DDR1_DQ[35] DDR1_DQ[39] RSVD RSVD VSS DDR0_DQ[44] DDR2_DQ[37] DDR2_DQ[36] VSS DDR1_WE# DDR1_RAS# DDR0_CS#[0] DDR2_CS#[0] VDDQ DDR2_MA[2] DDR1_CLK_P[1] VSS DDR1_CLK_N[1] DDR2_CLK_N[2] VDDQ DDR2_MA[12] DDR1_MA[9] DDR2_MA[15] DDR2_CKE[1] VDDQ RSVD RSVD DDR0_DQ[35] RSVD RSVD VSS GND CMOS I/O GND CMOS CMOS CMOS GND CMOS CMOS CMOS CMOS PWR CMOS CLOCK GND CLOCK CLOCK PWR CMOS CMOS CMOS CMOS PWR O O O O O O O O O O O O I/O I/O I/O CMOS GND GND CMOS CMOS CMOS CMOS CMOS CMOS I/O I/O I/O I/O I/O I/O I/O GND Pin Name Buffer Type GND CMOS I/O Direction Datasheet 61 Land Listing Table 4-2. G33 G34 G35 G36 G37 G38 G39 G4 G40 G41 G42 G43 G5 G6 G7 G8 G9 H1 H10 H11 H12 H13 H14 H15 H16 H17 H18 H19 H2 H20 H21 H22 H23 H24 H25 H26 H27 H28 H29 H3 H30 H31 H32 H33 H34 H35 H36 H37 RSVD RSVD RSVD RSVD VSS RSVD DDR2_DQ[29] DDR1_DQ[42] DDR2_DQ[24] DDR0_DQS_N[2] VSS RSVD DDR1_DQ[46] DDR1_DQS_N[5] VSS DDR1_DQ[37] DDR1_DQ[44] DDR0_DQ[41] VSS RSVD DDR2_DQ[38] DDR2_DQ[34] DDR1_MA[10] VDDQ RSVD DDR2_MA[10] DDR1_CLK_P[3] DDR1_CLK_N[3] DDR0_DQ[40] VDDQ DDR2_CLK_P[2] DDR2_MA[9] DDR2_MA[11] DDR2_MA[14] VDDQ DDR1_MA[14] DDR1_BA[2] DDR1_CKE[0] RSVD DDR0_DQ[45] VSS RSVD RSVD DDR1_DQ[24] DDR1_DQ[29] VSS DDR1_DQ[23] DDR2_DQ[27] CMOS CMOS GND CMOS CMOS I/O I/O I/O I/O CMOS GND I/O CMOS CLOCK CLOCK CMOS PWR CLOCK CMOS CMOS CMOS PWR CMOS CMOS CMOS O O O O O O O O O O I/O CMOS CMOS CMOS PWR I/O I/O O CMOS CMOS GND CMOS CMOS CMOS GND I/O I/O I/O I/O I/O CMOS CMOS CMOS CMOS GND I/O I/O I/O I/O GND Pin Name Buffer Type Direction Table 4-2. H38 H39 H4 H40 H41 H42 H43 H5 H6 H7 H8 H9 J1 J10 J11 J12 J13 J14 J15 J16 J17 J18 J19 J2 J20 J21 J22 J23 J24 J25 J26 J27 J28 J29 J3 J30 J31 J32 J33 J34 J35 J36 J37 J38 J39 J4 J40 J41 RSVD DDR2_DQ[28] DDR1_DQ[43] VSS DDR0_DQ[16] RSVD DDR0_DQ[17] VSS DDR1_DQS_P[5] RSVD DDR1_DQ[40] DDR1_DQ[45] RSVD DDR2_DQS_P[4] RSVD DDR2_DQ[33] VSS DDR1_MA[0] RSVD DDR1_MA[1] DDR1_MA[2] VDDQ DDR0_CLK_P[0] RSVD DDR2_MA[3] DDR2_CLK_N[0] DDR2_CLK_P[0] VDDQ DDR2_MA[7] RSVD DDR2_CKE[0] DDR1_MA[6] VDDQ RSVD VSS RSVD RSVD DDR1_DQ[27] VSS DDR1_DQ[28] DDR1_DQ[19] DDR1_DQ[22] DDR2_DQ[26] VSS DDR2_DQ[19] DDR1_DQ[52] DDR2_DQ[18] DDR0_DQ[21] CMOS GND CMOS CMOS CMOS CMOS GND CMOS CMOS CMOS CMOS I/O I/O I/O I/O I/O I/O I/O I/O I/O GND CMOS CMOS PWR O O CMOS CLOCK CLOCK PWR CMOS O O O O CMOS CMOS PWR CLOCK O O O CMOS GND CMOS O I/O CMOS I/O CMOS CMOS I/O I/O CMOS GND CMOS I/O I/O CMOS CMOS GND CMOS I/O I/O I/O Pin Name Buffer Type Direction 62 Datasheet Land Listing Table 4-2. J42 J43 J5 J6 J7 J8 J9 K1 K10 K11 K12 K13 K14 K15 K16 K17 K18 K19 K2 K20 K21 K22 K23 K24 K25 K26 K27 K28 K29 K3 K30 K31 K32 K33 K34 K35 K36 K37 K38 K39 K4 K40 K41 K42 K43 K5 K6 K7 VSS DDR1_DQ[47] DDR1_DQ[41] RSVD VSS DDR2_DQS_N[4] VSS DDR2_DQ[41] VSS DDR2_DQ[32] DDR1_BA[1] DDR2_CS#[1] RSVD VDDQ DDR2_MA[1] DDR1_CLK_P[2] DDR0_CLK_N[0] DDR0_DQS_P[5] DDR2_CLK_N[1] VDDQ DDR2_MA[6] DDR2_MA[5] RSVD RSVD VDDQ RSVD DDR1_MA[4] RSVD DDR0_DQS_N[5] DDR1_DQ[31] VSS DDR1_DQ[26] RSVD RSVD DDR1_DQ[18] VSS RSVD DDR2_DQ[23] DDR2_DQS_N[2] DDR1_DQ[48] DDR2_DQS_P[2] VSS DDR0_DQ[10] DDR0_DQ[11] DDR1_DQ[49] VSS DDR2_DQS_N[5] CMOS CMOS CMOS CMOS GND CMOS CMOS CMOS GND CMOS I/O I/O I/O I/O I/O I/O I/O I/O CMOS GND I/O CMOS CMOS GND CMOS I/O I/O I/O CMOS O PWR PWR CMOS CLOCK CLOCK CMOS CLOCK PWR CMOS CMOS O O O O O I/O O GND CMOS GND CMOS GND CMOS CMOS CMOS I/O O O I/O I/O Pin Name DDR0_DQ[20] Buffer Type CMOS GND CMOS CMOS I/O I/O Direction I/O Table 4-2. K8 K9 L1 L10 L11 L12 L13 L14 L15 L16 L17 L18 L19 L2 L20 L21 L22 L23 L24 L25 L26 L27 L28 L29 L3 L30 L31 L32 L33 L34 L35 L36 L37 L38 L39 L4 L40 L41 L42 L43 L5 L6 L7 L8 L9 M1 M10 M11 RSVD RSVD DDR0_DQ[42] DDR2_DQ[40] DDR2_DQ[44] DDR2_DQ[39] DDR2_DQ[35] VDDQ RSVD DDR2_ODT[0] RSVD DDR1_CLK_N[2] VDDQ DDR0_DQ[47] DDR2_CLK_P[1] DDR2_CLK_N[3] DDR2_CLK_P[3] DDR_VREF VDDQ DDR2_MA[8] DDR2_BA[2] DDR2_CKE[3] DDR1_MA[3] VSS DDR0_DQ[46] DDR1_DQS_P[3] DDR1_DQS_N[3] DDR1_DQ[30] DDR1_DQ[25] VSS DDR1_DQS_P[2] DDR1_DQS_N[2] RSVD RSVD VSS VSS DDR2_DQ[22] DDR0_DQS_P[1] DDR0_DQ[15] DDR0_DQ[14] DDR1_DQS_N[6] DDR1_DQS_P[6] DDR2_DQS_P[5] DDR2_DQ[46] VSS DDR0_DQ[43] DDR2_DQ[45] VCC GND GND CMOS CMOS CMOS CMOS CMOS CMOS CMOS CMOS GND CMOS CMOS PWR I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O CLOCK PWR CMOS CLOCK CLOCK CLOCK Analog PWR CMOS CMOS CMOS CMOS GND CMOS CMOS CMOS CMOS CMOS GND CMOS CMOS I/O I/O I/O I/O I/O I/O I/O O O O O I/O O O O I O CMOS O CMOS CMOS CMOS CMOS CMOS PWR I/O I/O I/O I/O I/O Pin Name Buffer Type Direction Datasheet 63 Land Listing Table 4-2. M12 M13 M14 M15 M16 M17 M18 M19 M2 M20 M21 M22 M23 M24 M25 M26 M27 M28 M29 M3 M30 M31 M32 M33 M34 M35 M36 M37 M38 M39 M4 M40 M41 M42 M43 M5 M6 M7 M8 M9 N1 N10 N11 N2 N3 N33 N34 N35 VSS VCC VSS VCC VSS VDDQ VSS VCC VSS VSS VCC VSS VCC VSS VCC VSS VDDQ VSS VCC DDR0_DQ[52] VSS VCC VSS VCC DDR1_DQ[17] DDR1_DQ[16] DDR1_DQ[21] VSS RSVD DDR2_DQ[16] RSVD DDR2_DQ[17] DDR0_DQS_N[1] VSS RSVD RSVD DDR1_DQ[53] VSS DDR2_DQ[47] DDR2_DQ[42] DDR0_DQ[48] VSS VCC DDR0_DQ[49] DDR0_DQ[53] VCC DDR1_DQ[20] VSS CMOS GND CMOS CMOS CMOS GND PWR CMOS CMOS PWR CMOS GND I/O I/O I/O I/O I/O I/O I/O CMOS CMOS GND I/O I/O CMOS I/O Pin Name Buffer Type GND PWR GND PWR GND PWR GND PWR GND GND PWR GND PWR GND PWR GND PWR GND PWR CMOS GND PWR GND PWR CMOS CMOS CMOS GND I/O I/O I/O I/O Direction Table 4-2. N36 N37 N38 N39 N4 N40 N41 N42 N43 N5 N6 N7 N8 N9 P1 P10 P11 P2 P3 P33 P34 P35 P36 P37 P38 P39 P4 P40 P41 P42 P43 P5 P6 P7 P8 P9 R1 R10 R11 R2 R3 R33 R34 R35 R36 R37 R38 R39 Pin Name DDR2_DQ[21] DDR1_DQ[14] DDR1_DQ[15] DDR1_DQ[11] RSVD VSS DDR0_DQ[8] RSVD DDR0_DQ[9] VSS DDR2_DQ[49] DDR2_DQ[53] DDR2_DQ[52] DDR2_DQ[43] RSVD DDR2_DQ[51] VSS RSVD VSS VSS DDR1_DQ[8] DDR1_DQ[9] RSVD RSVD VSS DDR1_DQ[10] RSVD DDR2_DQ[20] DDR0_DQ[13] DDR0_DQ[12] VSS DDR2_DQS_N[6] DDR2_DQS_P[6] DDR2_DQ[48] VSS DDR2_DQ[50] VSS DDR2_DQ[54] VCC DDR0_DQS_P[6] DDR0_DQS_N[6] VCC DDR1_DQ[12] DDR1_DQ[13] VSS DDR1_DQS_N[1] DDR1_DQS_P[1] DDR2_DQ[10] CMOS CMOS CMOS GND CMOS CMOS CMOS GND CMOS GND CMOS PWR CMOS CMOS PWR CMOS CMOS GND CMOS CMOS CMOS I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O GND CMOS I/O GND GND CMOS CMOS I/O I/O CMOS GND I/O CMOS GND CMOS CMOS CMOS CMOS I/O I/O I/O I/O I/O GND CMOS I/O Buffer Type CMOS CMOS CMOS CMOS Direction I/O I/O I/O I/O 64 Datasheet Land Listing Table 4-2. [. . . ] Airflow of the fan heatsink is into the center and out of the sides of the fan heatsink. Airspace is required around the fan to ensure that the airflow through the fan heatsink is not blocked. Blocking the airflow to the fan heatsink reduces the cooling efficiency and decreases fan life. Figure 8-7 and Figure 8-8 illustrate an acceptable airspace clearance for the fan heatsink. [. . . ]

DISCLAIMER TO DOWNLOAD THE USER GUIDE INTEL I7-900 DESKTOP PROCESSOR




Click on "Download the user Manual" at the end of this Contract if you accept its terms, the downloading of the manual INTEL I7-900 DESKTOP PROCESSOR will begin.

 

Copyright © 2015 - manualRetreiver - All Rights Reserved.
Designated trademarks and brands are the property of their respective owners.